This invention relates to edge triggered flip flops and more particularly to a circuit arrangment for integrating into a single flip flop multiple clocked functions that would normally require multiple flip flops.
In logic design many flip flops require set and/or reset functions triggered by different clocks. Conventionally, this would be accomplished by setting and resetting individual flip flops for each function and then merging all these flip flop outputs together into a single flip flop. This requires complicated circuitry and increased circuit area.